[PDF.15tw] Design & Performance Evaluation of Arithmetic Units in DSM: VLSI Digital Circuit Design

Design & Performance Evaluation of Arithmetic Units in DSM: VLSI Digital Circuit Design

[PDF.qw32] Design & Performance Evaluation of Arithmetic Units in DSM: VLSI Digital Circuit Design

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 | #14526753 in Books |  2012-08-14 | Original language:English | PDF # 1 |  8.66 x.20 x5.91l,.31 | File type: PDF | 88 pages

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||About the Author|Autor Hiral Shah is working as an Application Engineer at Synopsys, Inc. CA-USA. She had done her Master's degree from CCET-GTU, Ahmedabad, Gujarat, India in Electronics and Communication (Major-VLSI). Her area of interests are in VLSI circuit d

The core of every microprocessor, digital signal processor and data processing application-specific integrated circuit (ASIC) is its data path. It is often the crucial circuit component die area, power dissipation, and especially operation speed is of concern. At the heart of data-path and addressing units in turn are arithmetic units, such as comparators, adders, and multipliers. It is also a very critical one if implemented in hardware because it involves an expensive ...

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