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Low Power Cmos Based Flash ADC: Low Power VLSI

Sudakar Singh Chauhan




[PDF.tp32] Low Power Cmos Based Flash ADC: Low Power VLSI

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 |  2012-09-22 |  2012-09-22 | Original language:English |  8.66 x.25 x5.91l, | File type: PDF | 108 pages

||About the Author|Sudakar SIngh Chauhan has received his M.Tech degree in VLSI Design Automation and Technique at NIT Hamirpur in 2009. Since then he has worked in CEERI Pilani in different projects in the field of Analog Design. He is working as an assistant pro

In the present work, a 4-bit and a 6-bit 100 MS/s flash analog to digital converter for low power SoC application is presented. CMOS inverter has been used as a comparator for low power design. By adjusting the ratio of channel width and length, the switching threshold of the CMOS inverter is varied to detect the input analog signal. The proposed architecture has a unique feature like power supply rejection ratio (PSSR) which plays very critical role in traditional analo...

You easily download any file type for your gadget.Low Power Cmos Based Flash ADC: Low Power VLSI   |  Sudakar Singh Chauhan. I really enjoyed this book and have already told so many people about it!

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